4-line to line Decoders/demultiplexers. Each or these 4-line-toline decoders utilizes TTL circuitry to decode four binary-coded inputs into one of. MOS technology. A binary code applied to the four inputs (A to D) provides a low level at the selected one of sixteen outputs excluding the other fifteen outputs. SNN .. of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration.
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Many TTL parts and older memory chips have active low enable inputs, so the active low outputs of this part can be connected directly to those inputs. These demultiplexers are ideally suited for implementing high-performance memory decoders.
Operating Free Air Temperature Range. High Level Input Current. If you want to know exactly what is going on then draw out the truth table, but it is unlikely their function will make much sense to you.
WhatRoughBeast 49k 2 28 However, due to the internal structure of theonly one output can be enabled at a time. When either strobe input is high, all outputs are high. Y Input clamping diodes simplify system design. Note 2 Not more than one output should be shorted at a time. Email Required, but never shown. Low Level Input Current. Each of the 16 outputs can be connected through a resistor and then through an LED to serve as a simple 16 LED controller.
And why are there 2 of them, you ask? V CC e Max.
View PDF for Mobile. Y Decodes 4 binary-coded inputs into one of 16 mutually. Y Typical power dissipation mW. Each or these 4-line-toline decoders utilizes TTL circuitry to decode four binary-coded inputs into one of sixteen mutually exclusive outputs when both the strobe inputs, G1 and G2, are low. All the other ouputs stay high. Since the ouputs are active low, NAND gates do the job.
Low to High Level Output. High Level Input Voltage. All datassheet are buffered and input clamping diodes are provided to minimize transmission-line effects and thereby simplify system design.
74154 Datasheet PDF
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Note 3 I CC is measured with all outputs open and all inputs grounded. My first question is more important This chip is often used in demultiplexing applications, such as digital clocks, LED matrices, and other graphical outputs.
Y Typical propagation delay. According to the internal logic diagram on the datasheet, the G inputs are connected to a two-input AND gate with inverting inputs, whose output feeds one datasneet of all the NAND gates that produce the outputs.
Free Air Operating Temperature. I OS Short Circuit. The active-low enable inputs allow cascading of demultiplexers over many bits.
I CC Supply Current.
Datasheet PDF –
Rather than providing only a single enable, both pins are used. Will someone please explain the purpose of inverting the outputs 0 through 15 as well as the use the NAND gates here? The active-low output is just how the design for that specific decoder was carried out – there is also active-high varieties.
There are probably two enable inputs because otherwise there would be two unused pins on the 24 pin package I don’t recall seeing 22 pin DIP packages. 774154 the datasheet below for a more comprehensive summary. For example, if the target application requires 16 7-segment LED displays, but your microcontroller only has dataseet lines to select which display is active, this vatasheet 74LS would provide a very effective method of essentially multiplying you selecting lines by a 4 times.
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Low Level Input Voltage. I am a new user so I didn’t know I had that power. If you wanted to generate a 1 of demultiplexer, you could use 16 s looking at the 4 least datasgeet bits, while a single would look at the 4 most significant bits, with one ouput going to each of the datashete 16 s.
So is it possible that both enables are hooked to a 2-input OR gate; this is just making use of the extra pins to make 24? Home Questions Tags Users Unanswered. This allows more flexibility in the logic functions available.
First, the inversion of the outputs simply means that the output is active low. Sign up using Facebook. Absolute Maximum Ratings Note.